The majority of integrated circuits (ICs) are made of a large number of interconnected field effect transistors (FETs). As the size and complexity of ICs increase and the number of transistors incorporated in the IC increases, the reliable interconnection of the transistors becomes a consideration of paramount importance. Reliable interconnections become more of a concern as the minimum feature size and the minimum spacing between features are decreased to allow the increased number of transistors on an individual chip or die. Of particular concern are the interconnections between the gate of a FET and an associated active area (gate to active) and between the gates of two FETs (gate to gate).
In conventional IC fabrication the connection between gate and active area requires the etching of an opening through a thick interlayer dielectric (ILD). The opening must be larger than the opening for other contacts such as for active area to active area connections. The simultaneous etching of openings of two different sizes leads to severe challenges because the different sizes lead to different etch rates with the larger opening etching at a higher etch rate. The larger opening can be over etched resulting in attack of an underlying metal silicide and the degradation of the electrical connection and to potential yield loss.
The logical layout of an IC commonly uses complicated shapes of gate structures for short gate to gate connections. As the feature size and spacing decreases, such complicated shapes will not be possible because of process limitations. For example, for very small feature sizes the available photolithographic technology may not be able to reliably print such structures. As a result, gate to gate connections will have to be made by a metal interconnection between unidirectional gates.
Accordingly, it is desirable to provide reliable and simplified methods for fabricating integrated circuits having gate to active area and/or gate to gate interconnections. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.